We go through the process of customizing Linux kernel in PetaLinux and also adding additional information about our hardware to device tree.
We go through the process of using Qt Creator software to create a GUI enabled Qt application for running on our ZYNQ Ultrascale+ device.
We configure PetaLinux to have its root file system on the second partition of the SD card. We then go through the steps required for preparing the SD card, creating disk partitions, formatting them and copying required PetaLinux files to each of the partitions.
We use Xilinx BSP provided for ZCU104 to build PetaLinux with the X (graphical user) environment enabled. We also customize PetaLinux root file system to include Qt Libraries. We then build the SDK that we need later for building Qt applications.
In this video we start looking at bringing up PetaLinux with its graphical user interface (X server) enabled. We talk briefly about the GPU block available inside Zynq ultrascale+ EG and EV devices. We briefly describe our flow for compiling petalinux. We show the primary view of our user application in Qt.
In this video we go through a simplified example design which transfers data between two chips at a total rate of ~ 5 GBits/s using LVDS signals. We look at how pin locations can affect the final timing of the design.
We continue with our simple PCI Express design example in this video and we show two different pin assignment scenarios for this design. We show how pin assignment can affect the quality of the place and route in the design.
First section of the video on Pin assignment. We look at pin assignment done for our ZCU104 based vivado project. We try to cover other topics briefly as well, we look at MIPI CSI2 RX IP as an example case, we also do pin assignment for a X4 Gen3 PCIe interface. We briefly talk about each of the High Density and High Performance IO Banks. This video is to be continued on the next part.
NOTE: At nVidia Jetson side, the screen capture frame rate was very low. So in the video you will see the parts I am showing Jetson screen at a lower frame rate.
Part 8 has 2 sections, each section in one video. We look at setting up the SPI Interface of nVidia Jetson AGX Xavier. We describe the hardware setup and the experiment we want to perform. We briefly look at System ILA IP at our ZCU104 vivado project
Welcome to part 7 of ZYNQ Ultrascale+ and PetaLinux videos. In this video we briefly describe the folder structure of deliverable package for these video series. We go through the Vivado projects for both of the ZCU104 and ZED boards. We describe the design architecture. We talk about the custom AXI Slave SPI cores. We produce the bitstream and XSA files for both of the board projects. These will be used for the coming videos.
Part 6 of the series about running PetaLinux on ZYNQ Ultrascale+. The updated hardware architecture is shown in this video. It contains the following 3 boards: 1) NVIDIA Jetson AGX Xavier 2) Xilinx ZCU104 3) Digilent ZED board I briefly discuss the architecture that we want to implement and our goals. These series will continue. Jetson, Xavier are trademarks of NVIDIA. ZYNQ, ultrascale are trademarks of Xilinx.
In this video I go through the steps required for building petalinux for ZCU102 board. Design sources are available upon a donation to googoolia.com
In this video I go through Xilinx vivado projects for both ZCU102 and Z-Turn boards. Vivado project for ZCU102 contains AXI I2C master, AXI SPI master and AXI GPIO IPs. Vivado project for Z-Turn contains AXI I2C slave and AXI SPI slave.
In this video and the following 2 or 3 videos we create a vivado design that contains GPIO, I2C and SPI interfaces for ZCU102. We then show how it is possible to talk to these peripherals using PetaLinux. We test our design by connecting a ZYNQ board to ZCU102 and monitoring the waveforms at its side.
In this video I go through the process of installing Xilinx Vivado and PetaLinux on a virtual machine which is running Ubuntu. I briefly talk about Xilinx SmartLynq cable. I show how one can have JTAG connectivity to FPGA board (ZCU102) from within Virtualbox machine.
This video covers the topics i want to talk about in the new series of videos i am creating. the main target device will be xilinx zynq ultrascale+. target board will be zcu102 and target operating system for ARM cores will be Petalinux.