Lesson 8 – An Overview on ZYNQ Architecture
This session is a brief overview of the architecture of Xilinx ZYNQ device.
It tries to talk about why this architecture can be useful for many computational tasks.
It shows the internals of the ZYNQ Programmable System (PS) briefly.
It discusses the AXI interfaces between the PS and the PL in the ZYNQ device.
Furthermore, it looks at the most important documents available for the ZYNQ device.
The ZYNQ PL is also discussed briefly.
For this session there exist four videos. Three are created at the studio of Electrical engineering department and the other is my screen cast. each of the videos has some parts which is not in the other video. I suggest to watch all.
Video 1 : Watch Online
Video 2 : Watch Online
This video contains descriptions also on some example ZYNQ boards:
Video 3 : Watch Online
This video provides introductory definition on AXI interfaces and then goes through further details on internal ZYNQ architecture.
Video 4 : Watch Online
Presentation : is available upon your request through your official email address.
Please make a donation if the videos have been useful for you.
Hi,
thanks for you interesting works. I’m jus an hobbyist but a learn a lot a new thing watching your lessons.
I cannot access to video 1 because, I have an advice that is ‘private’. If possible can give me te possibility
to watch?
Kind regards and thanks to give available your works.
Gian Maria Vescovi
Hi Gian,
Sorry for the inconvenience,
Might you try now and check if the problem is resolved?
Thanks.
Hi Mohammad,
yes now it’s ok I can see the video.
Thank you for fast reaction and for sharing interesting knowledge.
Kind regards
Gian Maria Vescovi
Hi Mohammad,
I have seen your zynq videos and found very helpful.
can i get presentation for this session(chapter 8)???
Hi Ashish, write me.
hi
tanks a lot for your work.
i wish to be successful always.
Hi Mohammad,
I watch your videos, they are really very helpful on my research.
Thanks a lot.
This is extremely useful to me! Thank you for making the video.
Hi Mohammad,
it is good please share this presentation to me.
Please send this PPT.
My email id:
Thanks
Hi Mohammad,
I have seen your Zynq videos and found very helpful for my project.
Can i get presentation for this Lession(chapter 8) ?
My email id:
Thanks !
Thank you very much for that very usefull training videos
can you attach power point of videos on your website?
hai sir,
i have seen your videos, its vety useful for my project and i need presentation of chapter 8, if possible can you share sir,
i have a doubt in my project and how can approach you either through whatsapp number or Gmail ID can i get sir.
Thanks & regards
sivasankar
Hi Mohammad.
This course is very helpful to me, I want Mandaras filing Chapter 8 and if not too much to ask you to put the necessary settings for Xilinx Zynq ZC702 card please.
My e-mail is
Hi Mohhammad.
Your videos have been very helpful.
Can you email me the presentation.
My email is
Thanks.
Hi Mohammad,
Please share your presentation to me @
Tom
Hi,
Please send the chapter8 presentation videos.
Hi Mohammad,
Greetings for the day!!!
I have a small question that is, How can we communicate between A-53 and R7 cores in Zynq ultrascale+ MPSOC using the OCM and DDR (Inter core communication)?
Can you please send me the reply as early as possible
Thank you,
Regards,
Krishna
cant you use the tightly coupled memory of r5 cores?
Hi Mohammad.
I appreciate your videos.
Can you email me the presentation?
My email is
Thank you.
Hello Dr.Sadri,
Can you share the ppt of the same to my email address.
thank you.
Hi Mohammad,
I have seen your zynq videos and found very helpful.
Can i get presentation for this session(chapter 8)?
Thanks you!
Hi. for presentation, write me from your university email account. thanks.
Hi can I have the ppt file of this lesson and. Thank you, my email :
Sir could you please send the presentation
Hi Mohhammad.
Your videos have been very helpful.
Can you email me the presentation.
My email is
Thanks.