Session |
Description |
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1 |
Intro to CPU |
--- |
2 |
4004 CPU |
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3 |
TMS1000 CPU |
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4 |
ZILOG Z80 |
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5 |
Zilog Z80
Definition of Memory Map
Different Modes of Addressing
AMD AM2901
Intel MCS-51
MCS-51 Registers
MCS-51 Data Space
MCS-51 Special function regs |
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6 |
MCS-51 Peripherals
UART
About Serial data transfer
techniques
I2C Bus
SPI
Analog Comparator
A/D |
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7 |
MCS-51 Stack
Sample Stack Operation
MCS-51 other special function
registers
Microchip Corporation
Introduction to ZigBee networks
PIC's bank number
PIC's data and code space |
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8 |
More about Stack
What is a code profiler?
Intro to real-time systems
What is a C compiler?
GNU C Compiler
Microchip PIC10 & PIC16
PIC17/18
What is DMA?
PIC24 and dsPIC
Multiply and Accumulate |
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9 |
More on Multiply & Accumulate
8086 CPU
backward compatibility
Addressing in 8086
8086 Pins
MIN and MAX modes for 8086
8086 Registers and Flags
Segment Registers |
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10 |
More description of DMA
simple DMA example
More description of Multiply & Accumulate
more on 8086 segment registers
CS, DS, ES and SS registers
Memory models in 8086
introduction to Co-processors |
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11 |
Fixed point numbers
Floating point numbers
Definition of Dynamic range
IEEE-754 standard
representation of floating point values
in IEEE 754 standard
Floating point add and multiplication
8087 Co-processor structure |
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12 |
Debugging an application under x86
(Using visual studio)
Debugging basic techniques
Floating point registers and floating point
co-processor
x86 assembly of a C program
x87 system architecture
Floating point function emulation and
comparison
Disassembling an application using
IDA Pro
TMS320C31 Floating point DSP intro
Why DSPs? |
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13 |
Bit-reversed addressing
Example C31 board demonstration
PROM - EPROM - EEPROM memories
Flash ROM memories
Floating point vs Fixed Point DSPs
Dynamic range in DSPs
Texas Instruments DSPs
What is a boot loader?
TMS320C3X internal block diagram
TMS320C3X DMA controller and
peripherals
Data and Instruction buses on C3X |
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14 |
Internal Structure of C3x DSP
Detailed description of bus operations
Detailed description of on-chip memories
C3x Architecture Registers
Zero-Delay Loops
Addressing modes in C3s DSP
Indirect addressing
Circular Addressing
Bit-reversed Addressing
Sample FIR Filter code |
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15 |
Analysis of sample C30 instruction
Pipelines in CPUs
Pipeline depth in CPUs
Effect of jump instruction on pipeline
Branch instruction in C3X DSP
Delayed Branch in C3X DSP
Branch Prediction |
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16 |
More description of Delayed Branch and
Branch Prediction
Definition of MFLOPS
Texas Instruments code composer
studio software for C3X DSP
Definition of compiler and linker
Memory Map of C3X DSPs
Linker Script and its structure
Debugging an application using
Code composer studio
Attach to process operation in X86
architecture
Addresses of applications in windows |
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17 |
More on linker script
Virtual memory addresses
and address translation
Page tables : Virtual to physical address
conversion
Translation Lookaside Buffer
Memory Management Unit
CAM memories
X86 protected mode of operation |
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18 |
Why do we use cache memories?
Basic idea of cache memory
Systems with Multiple Levels of Cache
Basic CPU cache structure
Direct Mapped Cache Memories
Fully Associative Cache Memories
Set-Associative Cache Memories
AMD Athlon-64 Cache Structure |
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19 |
SRAM memories
Asynchronous SRAM memory operation
Synchronous NoBL SRAM memory
NoBL SSRAM operation
DRAM memory operation
Sample DDR SDRAM memory timing
Basics of Address decoding
The introduction to ARM CPU
ARM CPU history |
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20 |
More on ARM histroy
What is a core?
ARM as a licensable core
ARM income
Different families of ARM architecture
Brief intro on capabilities of ARM CPUs
Bus structure
Address Decoding
Co-processor interface |
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21 |
ARM Assembly Language
ARM Processor Operation Modes
ARM CPU Registers
CPSR Register
Shadow registers in different modes
Exception handling mechanism
Basic Assembly Instruction Syntax
Arithmatic and logical operations
Barrel shifter operation |
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22 |
Simple assembly program for ARM
Intro to ATMEL ARM evaluation kit
Multiplication operation for ARM
Load/Store instructions
Addressing Modes
Multiple Load/Store operations for ARM
Flow control instructions
Conditional branch in ARM
Stack operations and management |
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23 |
Sample ARM Assembly program
introduction to ATMEL ARM9 Eval kit
Development Environments for ARM
More on GNU C compiler
Definition of Cross-Compilation operation
Keil MDK for ARM
Simple C application for ARM
ARM Application Debugging and Simulation
Mixing C and Assembly language
Writing assembly sub-routines in C
Simple assembly sub-routine for data
transfer between two locations of memory |
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24 |
Branch and Link instruction in ARM
Conditional execution of instructions
Overview of ARM instruction set
Programming example: 64bit addition
Programming example: loops
Programming example: count negative
Parallel Input/Output for ARM uC
Programming PIO using C
important PIO registers
intro to Power Management controller |
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25 |
Overview of AT91SAM7X UART module
UART module registers
volatile type in C
Structure of a sample delay (wait) function
Brief description of programmable -
interval timer
Using C structs for managing peripherals
Multiple functionalities of device pins |
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26 |
Advanced interrupt controller
programmable interval timer
C programming for the above peripherals |
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