Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging

So far we have been talking mostly about AXI stream interfaces. Now it is the time to have a look at AXI memory mapped interfaces. We begin with a brief look at the signals which create an AXI memory mapped interface. Then we create an example design and with the aid of hardware debugging tool which is integrated into Vivado we take a look at how these signals interact with each other during a read or a write transaction.

This lesson is created at the professional video recording studio of TU Kaiserslautern and belongs to the Microelectronic Systems Design Research Group of TU Kaiserslautern.

Videos recorded for Lesson 12 (AXI Memory Mapped Interfaces) so far :

Part	Description	Link
1	AXI Memory Mapped interfaces and Hardware debugging. This video talks about the signals involved in an AXI MM interface. It also shows the process of debugging a hardware using ILA cores and debugging facilities of Vivado environment.	Watch online
2	Creating custom AXI Slave interfaces. This video describes the possible ways of creating AXI slave interfaces.	Watch online
3	This video goes through the procedure of creating a module with AXI Slave interfaces using Vivado environment and customizing the module for a specific desired functionality.	Watch online
4	Creating custom AXI Master interfaces. This video describes how you can add an AXI Master plug to your module. For this purpose we use the AXI Master burst IPIF provided by Xilinx.	Watch online

Chaitanya Kadiyal - June 16th, 2015 at 1:03 pm none Comment author #7559 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

I have been watching your video on memory mapped interfaces they are really a great help.Dr.Sadri could you please share the presentation for axi slave and axi master interface video also the RTL design files if possible.
Thank you in advance.

- June 16th, 2015 at 10:20 pm none Comment author #7564 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Hi. As I have mentioned this lesson is being created under the collaboration that I have with the microelectronic systems design research group of TU kaiserslautern. On their web site you can find the slides and also the source code for examples that I do in the class. For the web site address please have a look at the youtube channel of microelectronic systems design research group of tu kaiserslautern. Thanks.

- Rasesh - October 30th, 2015 at 12:46 pm none Comment author #8423 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
  
  Hello,
  
  Can you provide link of the source code @ Microelectronics system design website?
  
  I am not able to find it.
  
  Thanks in advance.
  
  - - November 23rd, 2015 at 10:02 pm none Comment author #8555 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
    
    that should be just down below the video in youtube.
    
    - Ajay Gupta - July 19th, 2016 at 5:41 pm none Comment author #9584 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
      
      Hi,
      link for source code below the youtube video is not working. So kindly share the same.
      
      Thanks
      Ajay Gupta
  - Anton Bakulev - December 29th, 2019 at 11:16 pm none Comment author #11513 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
    
    Updated address is https://ems.eit.uni-kl.de/lehre/online-kurse/
    
    - - September 27th, 2020 at 6:07 pm none Comment author #11537 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
      
      Thanks

Chaitanya Kadiyal - June 22nd, 2015 at 11:59 am none Comment author #7596 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Dr.Sadri I have a question If i am using axi master interface is it necessary to have memory interface generator also if I am planning read/write to memory ?
Thank you for your time

- June 28th, 2015 at 9:42 pm none Comment author #7634 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Hi, I dont understand the relationship between an AXI component with a Master port, and a MIG. these things are two different entities.

Ajay Gupta - November 29th, 2015 at 9:06 am none Comment author #8601 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Hi,
These videos are the great help to understand the ZYNQ devices.
My question is that as you have used the linux environment to do some of the things, Can we do the same in the windows environment? If yes how can we install the required libraries and the set the required environment variables.
please help!!!!!

Thanks
Ajay Gupta

- November 29th, 2015 at 5:11 pm none Comment author #8602 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Hi Ajay, of course the entire xilinx suite runs on windows as well, but overall, I don’t like windows for development tasks.
there is a complete document from xilinx on how to install their tool and set env. variables for the windows os.

- Ajay Gupta - July 19th, 2016 at 5:41 pm none Comment author #9585 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri
  
  Hi,
  link for source code below the youtube video is not working. So kindly share the same.
  
  Thanks
  Ajay Gupta

Abhinav Sharma - July 11th, 2016 at 9:09 am none Comment author #9533 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

Hi Dr. Sadri,
Hope you are doing well. In this video “AXI Memory Mapped Interfaces and Hardware Debugging” in the last you created the tcl file which you executed and source for read/write operations. so how can we write those tcl scripts and where to store it so that we can source those files appropriately.

Thanks,
Abhinav

Abhinav Sharma - July 11th, 2016 at 12:31 pm none Comment author #9535 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

I got it sir. I tried writing the tcl file using the commands which gets popped up on executing the tcl file and it WORKS !!.
Great job by you sir . Thank you so much for the support that you have provided.

Thanks,
Abhinav Sharma

- August 14th, 2016 at 8:37 pm none Comment author #9662 on Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging by Mohammad S. Sadri

hi. i am not sure if i understand your question. the .tcl file is a simple text file we can create with any editor. and the set of commands we can use inside the tcl for each of the xilinx tools is defined in their documentation completely.

Lesson 12 – AXI Memory Mapped Interfaces and Hardware Debugging

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